Expoint - all jobs in one place

Finding the best job has never been easier

Limitless High-tech career opportunities - Expoint

Facebook Digital Design Engineer 
United States, California, Sunnyvale 
391735231

17.04.2025
Reality Labs (RL) focuses on delivering Meta's vision through Virtual Reality (VR) and Augmented Reality (AR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. Reality Labs Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR & VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms.
Digital Design Engineer Responsibilities
  • Contribute to ASIC digital µArchitecture and design for chip-level infrastructure and I/O logic
  • Achieve chip-level performance and power targets in addition to implementing mission and test mode functionality
  • Work with system and silicon architects to realize designs that satisfy product requirements
  • Specify requirements for, then support intake and integration of, IPs and subsystems into larger SoC environment
  • Work cross-functionally with adjacent chip-level teams such as Verification, Physical Design, and Design-for-Test
Minimum Qualifications
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
  • 5+ years of experience as a Hardware Design Engineer for production silicon shipped in volume
  • Experience in digital design µArchitecture and RTL coding
  • Experience in SoC integration and ASIC architecture
  • Experience with at least 1 procedural programming language (C, C++, Python etc.)
Preferred Qualifications
  • Experience in SoC bus and interconnect protocols
  • Knowledge of physical design and low-power implementation
  • Experience with high-speed I/O protocols (e.g. PCIe, USB, MIPI, LPDDR)
About Meta

$142,000/year to $203,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about at Meta.