המקום בו המומחים והחברות הטובות ביותר נפגשים
What you will be doing:
Work as part of a global circuits team to develop various innovative IPs for Hardware Security, Clocking and Silicon Correlation
Own the unit and system level verification of various IPs, create functional test plans, and verify using advanced verification tools, flows and methodologies.
Build and reform verification infrastructure and methodologies to meet the demands of next generation IPs.
Enable design specification development but participating in discussions on architecture, intent, and implementation of the various IPs.
Enable system level integration by working with other teams for test development and debug.
What we need to see:
BSEE (or equivalent experience) with 5+ years' experience in unit level or system level verification or MS preferred in Electrical, Computer Engineering with 3 years’ experience in unit level or system level verification.
Proficiency with Object Oriented Programming, System Verilog, Verilog, UVM.
Strong skills with VCS or equivalent simulation tools like Questa is required.
Strong debugging and analytical skills are required.
Have a continuous improvement mentality and passionate about delivering bug-free first silicon.
Ways to stand out from the crowd:
Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies is a huge plus.
Strong knowledge or work experience in Mixed signal and custom designed IPs solutions.
Strong interpersonal skills and ability to work with on-site and remote teams is a plus.
Proficiency in scripting language, such as, Perl, Tcl, Make files and automation methods/algorithms a certain plus.
Prior leadership experience a certain plus.
You will also be eligible for equity and .
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