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Apple FE Engineer 
United States, California, Cupertino 
872914838

Today
  • Master’s degree or foreign equivalent in Electrical Engineering or related field and 1 year of experience in the job offered or related occupation.
  • Experience and/or education with each of the following:
  • Experience in computer architecture specification and performance analysis, including determining initial microarchitecture specification of a design.
  • Utilizing System Verilog or other HDL (hardware description language) to code RTL (register transfer level) of the design.
  • Utilizing Assertions and Coverage in System Verilog or other HDL to accelerate design verification.
  • Utilizing Power Artists, PrimeTime PX or other industry standard EAD tools for power to measure power consumption of the design.
  • Utilizing PrimeTime or other industry standard EAD tools for timing to analyze, debug, and improve critical path timing.
  • Utilizing Verdi or other waveform viewers to analyze simulation waveforms and debug functional failures in RTL design.
  • Utilizing Design Compiler or other industry standard EAD tools for synthesis to synthesize the design from System Verilog or other HDL and analyze area/timing/power,
  • Working with front end implementation team to execute floor planning for PPA.
  • Experience in improving the PPA of the design with digital circuit design techniques, including low-power designt techniques, clock domain crossing techniques and FSM (finite state machine) design techniques.
  • Working with verification team to develop verification testplan and checker for RTL design correctness.