In this job you will be responsible for specifying and/or micro-architecting digital blocks in advanced mixed-signal circuits with embedded micro-controller, advanced DFT architectures and very low power design requirements. You will be also responsible for RTL coding of blocks specified by you or others. You will participate in the design verification and bring-up of such blocks by writing RTL assertions, debugging code, and otherwise interacting with the design verification team. Additionally, you will be responsible for various front end methodology flows that include pre-silicon power analysis, clock domain crossing, reset domain crossing and unified power flow UPF). You will participate in the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.