Marvell Senior Analog Layout Engineer 

United States, California 

830494872

What You Can Expect

• Design and optimize analog mixed-signal layouts such as RX, TX, PLL on schematics such as RX, TX, PLL given by design team.
• Work closely with circuit designers and other teams to meet project specifications and timelines.

• Responsible for floor planning, custom layout, and verifying against design rules and schematics, including DRC, LVS, ANT, LUP, ESD, and PERC.

• Maintain detailed documentation of layout methodologies, design decisions, and verification results。

What We're Looking For

• Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 4-7 years of related professional experience.
• Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 2-4 years of experience.

• Proficiency in CAD tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys Custom Compiler. Virtuoso is preferred.
• Familiar with LVS, DRC, ERC, antenna, EM/IR, and ESD/LUP.
• Familiar with FinFET. Preferred if familiar with TSMC 5nm, 3nm, 2nm

• Strong communication skills.
• Ability to mentor junior engineers.
• Ability to work across teams.