מציאת משרת הייטק בחברות הטובות ביותר מעולם לא הייתה קלה יותר
Today’s exceptional challenges require your unique skills. It’s You & Western Digital. Together, we’re the next BIG thing in data.
ESSENTIAL DUTIES AND RESPONSIBILITIES:
Lead a team of motivated analog & mixed signal circuit design engineers.
Develop array & periphery circuit architecture to meet product specifications.
Ensure resourcing is aligned to meet execution deliverables.
Engage in project technical challenges to ensure alignment with project goals.
Drive technical efforts necessary to bridge any spec gaps.
Ability to provide mentorship and guidance to team members.
Able to drive tasks independently & efficiently to completion.
Communicate efficiently between design teams, logic, process, product / test engineering and architecture teams.
Own analog & custom circuit design verification methodologies including Monte Carlo simulations, PVT simulations, aging, SOA, aging, post extraction simulation, use of RC parasitic elements for signal modelling, & EM / IR analysis.
REQUIRED:
Excellent people skills with the ability to collaborate with cross functional teams including analog & logic design engineers, mask designers, CAD, and TD.
In-depth knowledge of analog building blocks including sense amplifiers, core address drivers, regulators, bandgap, current mirrors, level shifters, buffering circuits, DAC, ADC, temperature sensors (PTAT), high speed CMOS circuits.
Self-motivated, creative thinking, strong debug skills, mentoring, motivational and positive attitude.
In depth knowledge of analog & mixed signal circuits & concepts including mismatch, linearity, low power CMOS design.
Experience with HV voltage transistors and designing to external foundry PDK.
Experience with Cadence Virtuoso or similar design suite tools.
Experience with custom circuit design simulation & waveform tools like HPSICE, SPECTRE, FINESIM, EZWAVE or similar tools.
PREFERRED:
Excellent verbal and written communication skills.
Familiarity with UNIX, PERL or/and Python scripting.
Ability to lead post silicon power up activities and post silicon validation.
Design experience with NAND or DRAM or SRAM or similar memory technologies.
Compensation & Benefits Details
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