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Intel's IDM 2.0 strategy includes a plan to significantly expand the manufacturing network, establishing new capacity and capability to meet the accelerating global demand for semiconductors. The external Packaging and Assembly Engineering team (EPAE) will play a critical role in this strategy, leveraging external assembly technologies to deliver leadership products. This position is a Deputy Platform Manager for Flip Chip technologySeeking a Flip Chip assembly expert to strengthen the external assembly platform management team through deep understanding of Flip Chip assembly technology. With the key objectives to help setting up competitive and easy to use assembly platforms you will be expected to support the operative part, structuring, and execution platform goals; Build a strong and intimate relationship with the team across multiple levels and organizations, timely execute/drive established tasks in close collaboration with the platform manager and partner teams. Lead progress of generation of technical spec and assessments and design rules for product sourcing to NPI. Direct influence and enablement of platform programs through broad technical experience and expertise.The ideal candidate should exhibit the following behavioral traits:
Motivated self-starter / self-driven with strong ability to work independently as well as influence the team.
Excellent communication, tolerance of ambiguity, and commitment to tasks.
Skills to address complex problems and find solutions.
Highly collaborative that can effectively drive stakeholders to win results for Intel.
Excel in leading in a highly matrixed development environment.
Executes toward results with focus and a sense of urgency.
Motivated individual with a can-do attitude.
Is willing to take informed risks to achieve desired team goals.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Master's Degree in an Engineering field relevant to Research and Development activities in VLSI design, materials or semiconductor manufacturing or a related field of study.
4+ years of relevant experience in the assembly and packaging area.
4+ years of hands-on experience leading developments in flip chip packaging.
Preferred Qualifications:
A Ph.D. degree in an Engineering field.
4+ years of experience:
With design and design rules.
In advanced packaging technologies development or pathfinding
In virtual basic programming and CAD drawing.
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