Cisco ASIC Design Engineer 

United States, California, San Jose 

734133831

Author micro-architecture specifications and participate in specification and test plan reviews.

Architect and implement complex RTL designs.

Scope third party IP requirements and solicit vendors.

Analyze code coverage and provide feedback to the verification team to achieve coverage closure.

Perform LINT and CDC checks.

Triage, debug, and root cause simulation, software bring-up, and customer failures.

Perform diagnostic and post silicon validation tests in the lab.

Mentor and coach colleagues.

Static Timing Analysis skills including generating constraints, performing quality checks such as setup, hold, transition and noise are considered advantageous.

Bachelor's degree in Electrical Engineering, Computer Science or related degree with 5+ years of ASIC design experience or Masters degree in Electrical Engineering, Computer Science or related degree with 3+ years of ASIC design experience

Experience in Verilog/System Verilog programming skills.

Experience in interactive and waveform debug skills.

Experience with low-power design and clock domain crossings.

Experience with scripting such as (Python, Perl, TCL, Shell programming)

Networking knowledge preferred, but not essential.

Have good communication, interpersonal skills and a keen interest to work closely in a team environment.

Have a good understanding of the fundamentals of ASIC Design principles