Expoint – all jobs in one place
מציאת משרת הייטק בחברות הטובות ביותר מעולם לא הייתה קלה יותר
Limitless High-tech career opportunities - Expoint

Apple Design Verification Engineer 
United States, California, San Diego 
68709115

Yesterday
APPLE INC has the following available in San Diego, California. Verify the quality of the System on Chip (SOC) by reviewing specifications, developing attributes, tests and coverage plan, and defining methodology and test benches. Align with design and micro-architecture teams to analyze, define and develop the functional and performance goals of the design and test plan. Develop verification environment including sequences, agents and scoreboard, and constraints for various use case scenarios in SystemVerilog or Verilog and C++. Understand and develop checkers for industry standard protocol in Verilog or SystemVerilog. Write Perl scripts to process results. Modify design specs by conducting test plan reviews. Develop block or full chip tests and triage failures. Drive the verification efforts in the specific area. Support gate level functional verification, run regressions, handle bug tracking, and analyze code and functional coverage. Perform electrical engineering tasks, such as hardware verification using simulation tools, to ensure the electronic chip will perform as expected. Perform electronic system on chip (SoC) verification for a diverse range of Apple products, including writing programs to verify electrical systems and the functionality of electrical hardware. Verify electronic systems within Apple hardware and perform pre-silicon hardware verification. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $135,400 - $204,000/yr and your base pay will depend on your skills, qualifications, experience, and location.
  • Master’s degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronics Engineering or related field.
  • Experience and/or education must include:
  • Verification language: SystemVerilog, UVM, OVM, Verilog, or VHDL.
  • Debug of C and Verilog code
  • Programming in Object Oriented programming, C, C++, System Verilog, Python, or Perl
  • RTL stimulation or debugging
  • Test and scripting in Perl, Tcl, shell, Makefile, or Python
  • Functional validation or performance validation