Cisco Hardware Engineer 

Armenia, Yerevan 

582081751

Job Role and Responsibilities:

• Synthesis at the block level
• Block level place & route
• Block-level STA analysis
• Generation and roll-in of timing ECOs
• Block-level physical verification
• Block-level EMIR analysis
• Low power checks
• Formal verification
• Participate in review discussions

Required Experience and Skills:

• In-depth knowledge of CMOS basics, Full chip - Netlist2GDSII Implementation i.e. Floorplanning, Power Grid Design, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification, Chip finishing.
• Should have experience on Physical Design Methodologies and sub-micron technology of 7nm, 5nm and lower technology nodes.
• Understanding the practical application of methodologies and Physical Design Tools, Flow
• Should have experience on programming in Tcl to automate design process and improve efficiency.