Application window has been
extended and expected to closeJob posting may be removed earlier if the position is filled or if a sufficient number of applications are received.
The Common Hardware Group (CHG) delivers the silicon, optics, and hardware
and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations(TOR) switches all the way through web scale data centers and across serviceprovider, enterprise networks, and data centers with a fully unified routing anddesigning, developing and testing some of the most complex ASICs being developedin the industry.
You will work with front-end RTL Design and Verification teams and Architects to
understand chip architecture and drive design verification requirements. You’ll workhandshake between hardware and software functionalities and qualify use-caserequirements. You’ll also have the opportunity to work with systems-testing teamsduring post-silicon validation efforts to bring-up, debug and qualify the ASIC indeployment-mode applications.Your Impact
You will participate in the ASIC design verification for Cisco high-end switchingProducts, one of the largest and most sophisticated of its kind in the industry. You willuse the microarchitecture and define the verification plan and be responsible for theentire verification process.
You will develop the verification environment, including creating and executing test plans, and perform any necessary debugging. You will take part in the development of simulation models, test plan, code or functional coverage, multi-chip/system simulation, and performance analysis.
Minimum Qualifications:
BSEE/CS combined with 4+ years of related experience.
4+ Years post graduate hands on experience with System Verilog / UVM programming
4+ Years post graduate ASIC Verification processes, methodologies, flows and tools
Experience with scripting languages Python or Perl
Previous experience in debugging
Experience working on Linux / Unix
Preferred Qualifications:
MSEE/CS combined with 3+ years of related experience
Understanding of Networking technologies and concepts
Experience with Formal verification
Experience with Post-silicon lab bring-up
Experience with C/C++ Programming