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Cisco ASIC Verification Engineer United States, California, San Jose 526532909
27.01.2025
Application window has been extended and expected to close 02/28/2025.
Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.
You will work with front-end RTL Design and Verification teams and Architects to understand chip architecture and drive design verification requirements. You’ll work with SDK and Software teams as part of ASIC development to create a flawless handshake between hardware and software functionalities and qualify use-case requirements. You’ll also have the opportunity to work with systems-testing teams during post-silicon validation efforts to bring-up, debug and qualify the ASIC in deployment-mode applications.
Your Impact
Minimum Qualifications:
- BSEE/CS combined with 4+ years of related experience.
- 4+ Years post graduate hands on experience with System Verilog / UVM programming
- 4+ Years post graduate ASIC Verification processes, methodologies, flows and tools
- Experience with scripting languages Python or Perl
- Previous experience in debugging
- Experience working on Linux / Unix
Preferred Qualifications:
- MSEE/CS combined with 3+ years of related experience
- Understanding of Networking technologies and concepts
- Experience with Formal verification
- Experience with Post-silicon lab bring-up
- Experience with C/C++ Programming
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