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Google AI/ML RTL Design Engineer TPU Google Cloud 
India, Karnataka, Bengaluru 
56095782

18.09.2024
Minimum qualifications:
  • Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, a related technical field, or equivalent practical experience.
  • 3 years of experience in ASIC/SoC development with Verilog/SystemVerilog.
  • Experience in design of Machine Learning IPs, or graphics IPs, managing low precision/mixed precision numerics.
  • Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).

Preferred qualifications:
  • Experience with programming languages (e.g., Python, C/C++ or Perl).
  • Experience in SoC designs and integration flows.
  • Knowledge of high performance and low power design techniques
  • Knowledge of neural networks, arithmetic units, processor design, accelerators, bus architectures or memory hierarchies.