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Google Silicon RTL Design Engineer TPU Google Cloud India, Karnataka, Bengaluru 397521756
25.09.2024
Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 3 years of experience in ASIC/SoC development with Verilog/SystemVerilog.
- Experience in micro-architecture and design of IPs and subsystems.
- Experience with ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).
Preferred qualifications:
- Experience with programming languages (e.g., Python, C/C++ or Perl).
- Experience in SoC designs and integration flows.
- Knowledge of arithmetic units, processor design, accelerators, bus architectures, fabrics/NoC or memory hierarchies.
- Knowledge of high performance and low power design techniques.
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