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Intel Senior Physical Design Analog Integration Engineer 
United States, Texas 
510501090

08.04.2025
Job Description:

Responsibilities will include but are not limited to:

  • Drive all aspects of analog integration domain, including analog routeimplementation/extraction/verification,AIP floor planning, PKG interactions w/ analog IOs, power framework simulations, ESDplanning/verification,MIM, and GPIO planning
  • Collaborate across multiple teams/stakeholders to create optimal solutions across Platform/PKG/SoC
  • Create, run, and analyze simulations for design and verification of analog circuitry such as amplifiers, reference systems, ESD, and high-speed Rx/Tx circuitry
  • Scope process technologies and enable integration of Analog IP and silicon supplied by external vendors
  • Support post-silicon activities in debug and failure analysis for analog and power delivery

The ideal candidate should exhibit the following behavioral traits/skills:

  • Have expertise with domain specific signoff tools including: HV Openrail, Redhawk, LV/antenna checks.
  • Have experience with IP design, packaging and delivery methodologies and flows as well as generation of IP integration documents and datasheets
Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

  • Bachelor's or Master's degree in Computer Science, Computer Engineering or Electrical Engineering.
  • 6+ years of Analog design experience including Analog integration and AIP design
  • 6+ years experience with SoC analog requirements, including analog distributions, and ESD.

Preferred Qualifications:

  • Experience with Design tools and methods.
  • Full chip integration, die-to-die and package integration experience.
  • 2.5/3D design experience and implications on analog design.
  • Experience with power delivery design and flows
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