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Apple Emulation Verification Engineer United States, California, Sunnyvale 45477878
30.08.2024
Minimum Qualifications
- BSEE + 7 years of industry experience.
- Hands-on experience with bring up, debugging and verification in Emulation
- Proven design verification skills
- Experience with System Verilog verification environments including C/C++ DPI, UVM
Preferred Qualifications
- MSEE +5 years of industry experience.
- Understanding of the tool flow from RTL to Emulation is a big plus
- Experience in writing Synthesize-able SystemVerilog/Verilog code and SystemVerilog assertions
- Good understanding of any Standard Emulator (Palladium, Veloce, Zebu) OR FPGA (Xilinx, Altera) flow
- Experience on any Scripting (Perl/Python/TCL)
- Excellent analytical and debug skills
- Experience in UVM Acceleration is plus
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $143,100 and $264,200, and your base pay will depend on your skills, qualifications, experience, and location.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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