Nvidia Package Layout Engineer 

Israel, North District 

45361120

What you'll be doing:

• As part of IC Packaging Design team, you will collaborate to implement high speed and PDN design for ASIC packages.

• Develop footprints symbols, pad stacks and perform substrate routing, placements, DRCs adaptations, power/ground distribution, using Cadence APD or SiP as main layout tools.

• Optimize package pin-out, incorporating system level trade-offs of pins assignment and area utilization.

• Develop methodologies to improve working environment, productivity, reliability and time-to-market considerations.

• cooperating closely with SI/HW/Tester design and production teams

• Timeline planning and frequentlystakeholders/managementreports, as part of projects leading from scratch, up to a final manufacturing starting point

What We Need to See:

• B.Sc. Electrical Engineering or an Electrical Practical Engineer certificate

• Minimum of 2+ years hand-on in PCB/Substrate layout experience

• Knowledge in substrate or PCB manufacturing process – an advantage

Ways to Stand Out From the Crowd:

• Familiarity with Lisp/Skill(Cadence) language or general parsing capabilities and regular-expression proficiency(Python/Perl/Shell-scripting/NPP/UNIX/VBA)

• Former design experience, involving high-speed interfaces and signals/power integrity practices.

• Basic background with files revision control concepts and different platforms