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Intel Analog Layout Design Engineer Israel, Haifa District, Haifa 176961203
22.07.2024
Your responsibilities will include, but not limited to:
- Designing Layout of sensitive analog components such as receivers, transmitters, clocking, ADC/DAC, PLL, and LDO for High-Speed IO IPs using TSMCs & INTEL's current and next-generation process nodes.
- Working with complex analog signal circuits for a given design specification following design verification tools for process design rules, electron migration, voltage drop (IR), ESD, and other reliability checks on the layouts.
- A Layout Designer role: you need to align with Design constraints, Floorplan, Power grid, ESD, Bumps, reliability in order to meet performance, and all required verification, following a detailed block plan to align with project schedule.
- Troubleshoots a wide variety of topics including difficult design issues.
Qualifications
- B.Sc. in Electrical Engineering or Physics.
- At least 5 years of experience in Analog Layout Design/Physical Design.
- Expansive Layout knowledge and practical application of methodologies and physical design.
- Excellent communication and expected to drive clarity across customers, stakeholders, partners, and managers.
- Excellent teamwork and being flexible in assignments as per project needs.
- Previous experience in high-speed SERDES/Ethernet - Advantage.
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