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Apple Formal Verification Engineer 
United States, Texas, Austin 
446420908

07.04.2025
As a formal verification engineer working the complete formal verification for single or multiple design blocks and IPs (CPU, Cellular and Connectivity IP, Audio and Image Processing IP, Neural Networks IP, Memory/DMA Controller, Security IP, Peripheral IP, Interconnects, Power management subsystems, etc.), you will be: - Working with Apple Silicon's world-class Security Enclave design engineers to develop a formal micro-architecture specification- Developing comprehensive formal verification test plan that includes unique security requirement verification- Proving properties of the design, finding design bugs, and working closely with design teams to help improve the micro-architecture.- Crafting novel and creative solutions for modelling security attacks and proving robustness of complex design micro-architectures- Developing and implementing re-usable and optimized formal models and verification code base- Architecting correct-by-construction design methodologies for improved formal verification efficiency and productivity.
  • Bachelor's degree in electrical engineering, computer engineering, or related field with 0 years of experience.
  • Interest in learning and becoming an expert in SoC, CPU, GPU, or Cellular design
  • Detail oriented approach and desire to overcome challenges is required.
  • Formal Method or Formal Verification technologies knowledge is a plus.
  • Knowledge and experience in interpreting hardware specifications
  • Proficiency in any scripting language with excellent debugging skills
  • Excellent interpersonal skills.
  • Passionate about developing world-class/innovative formal verification solutions