Intel Formal Verification Engineer 

United States, Texas 

322008988

Who You Are

Come and join a winning team atFVCTO (Formal Verification Central Tech Office). As a Formal Verification Engineer, you will be responsible the following but not limited to:

• Verify microarchitecture using industry standard Formal Verification tools and technologies based on latest model checking and equivalence checking algorithms on world class design IPs & SOCs for Server, Client and Graphics.
• Use the hardware architecture design and RTL implementation details.
• Define the Formal Verification scope, deploy the right strategy to prove the correctness while deploying advanced formal techniques, and create abstraction models for convergence on the design.
• Carve out the right boundaries for the design, create comprehensive formal verification test plans, track, verify, apply abstraction techniques, and converge on complex designs to deliver a high-quality design on schedule and articulate the ROI. Analyses new methodologies, evaluates new tools and corroborate results.
• Work with vendors on resolving hard design and tool problems.

In addition to the qualifications a successful candidate will demonstrate:

• Problem solving and debugging skills.
• Willingness to work closely with various design teams and cross site teams.
• Verbal and written communication skills.
• Motivated, self-directed and can work effectively both independently and in a team environment.

Qualifications:

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

The candidate must possess the following;

• Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science or a related field with 4 years relevant experience or schoolwork
• – OR - Master’s Degree in Electrical Engineering, Computer Engineering, Computer Science or a related field with 3 years relevant experience or schoolwork
• – OR – PhD in Electrical Engineering, Computer Engineering, Computer Science or a related field with 1 year relevant experience or schoolwork

Experience in the following:

• RTL languages like System Verilog or VHDL
• Assertion languages like SVA, formal verification.

Preferred Qualifications

Experience with:

• The fundamentals of formal verification technology, including model checking and writing formal assertions to express architectural intent of designs
• Formal verification principles and methods
• Computer architecture, digital design and verification methods
• Research in formal verification domain

Experienced HireShift 1 (United States of America)US, Oregon, HillsboroUS, California, Santa Clara
Position of Trust

offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US: