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Apple Graphics Cache Hierarchy Design Verification Engineer United States, California 441676045
07.04.2025
The GPU Caches, Mem-Hierarchy Verification team is responsible for architectural and µ-architectural verification of sub-blocks within the memory hierarchy of the GPU like caches, interconnects and MMU Units. This role will grow your expertise in both software engineering as well as graphics hardware architecture and µ-architecture. As a member of this team, you will be responsible for authoring test plans for block or subsystem level functionality, architecting and developing highly complex verification software components, and working closely with design team members in debugging and closing the blocks you own. You will be able to work on test benches ranging from sub-blocks, blocks to subsystems containing multiple blocks.
- Computer Architecture or Computer systems Course work
- Experience with Hardware Description languages like Verilog or System Verilog
- Experience with Object Oriented Programming Languages and Data Structures.
- BS degree in CE, CS or EE
- Background in CPU or GPU architecture
- Good fundamental software and programming skills
- Design Verification course work with experience in verification languages such as SystemVerilog
- Experience with HDL simulators and waveform viewers.
- Strong fundamental software and programming skills
- Experience with caches, address translation units
- Experience with Perl, Ruby, Shell scripting, Makefiles
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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