מציאת משרת הייטק בחברות הטובות ביותר מעולם לא הייתה קלה יותר
Job Description:
Job Description:
BSEE and 2+ years relevant experience in DDR memory system design, validation, bring-up and debugging or MSEE degree with experience in DDR memory system design, validation, bring-up and debugging.
Required Skills:
• Experiencewith DDR memory interfaces including the PHY, controller and embedded test capability. Direct experience with HBM memory is a plus.
• Experiencedeveloping DRAM memory tests desired. Knowledge of different types of memory tests is a must.
• Understandfundamentals of VLSI IC I/O & control, and built-in self-test (BIST).
• Generalknowledge of semiconductor technology and ASIC design flow including Verilog simulation and timing analysis. Verilog experience is a plus.
• Experiencewith state-of-the-art lab test equipment used for evaluating memory interfaces including sampling scopes, real time scopes, function generators and logic analyzers.
Programming experience in at least one of the following languages: Ruby (preferred), C, C++, Perl, or Python
• Strongdebugging skills are a must
Additional Requirements:
• Strongverbal, written communication, and presentation skills.
• Teamplayer that can easily work with different personalities and skill levels.
• Abilityto multitask and manage multiple technical issues in parallel.
• Wellorganized, methodical, and detail oriented.
• Mustdevelop, accurately track, and meet commitments to product characterization or engineering development schedules.
• Someminimal travel time may be required.
Typical Duties Include:
• Developa detailed understanding of Broadcom's HBM IP, how to control and evaluate the IP, and understand the interplay of the memory performance at the ASIC and system levels.
• Developscripts and run characterization shmoos to isolate issues.
• Designautomated bench level device testing procedures by utilizing programmable test equipment and HBM IP built-in test functions.
closely with the HBM IP design teams to root cause HBM issues.
with memory suppliers to support resolution of HBM DRAM issues or defects.
• Generatecomprehensive test reports with clear analysis methods that highlight the relationships between stimulus / setup conditions and device performance.
Compensation and Benefits
The annual base salary range for this position is $73,000 - $117,000.
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
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