Bachelors, Masters, or Ph.D. degree in Electrical Engineering, Computer Engineering, or Computer Science with a strong computer architecture, microarchitecture, performance experience.
Proven experience in performance modeling, workload analysis, system performance analysis, and providing effective solutions and guidance with focus on coherent and non-coherent interconnects and memory systems.
Proficiency in C++ programming for large-scale software development and proficient with the Python scripting language.
Excellent interpersonal skills, strong initiative and open in engaging and learning new concepts and sharing with collaborators.
“Nice To Have” Skills and Experience :
Knowledge of SystemC Transaction Level Modeling (TLM) and interconnect micro-architecture design.
Experience with performance tools-their deployment, guiding and mentoring partners and other team members.
Ability to map processor design concepts to model blocks in a discrete-event simulation environment.
Use of AI for performance tooling, simulation enablement, or performance improvement.