מציאת משרת הייטק בחברות הטובות ביותר מעולם לא הייתה קלה יותר
Cisco ASIC Engineering Senior Technical Leader United States, California, San Jose 199955081
Today
The application window is expected to close on: May 12, 2025
The job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.
Your Impact
You will be part of the development organization as an ASIC Engineering Technical Leader with primary focus on RTL Design.
Key responsibilities:
- Create micro-architecture specifications and participate in reviews
- Implement Verilog RTL to meet timing and performance requirements.
- Help define, evolve, and support our design methodology.
- Collaborate with the verification team on as-needed basis to address design bugs and close code coverage.
- Work closely with physical design team to close design timing and place-and-route issues
- Triage, debug, and root cause simulation, software bring-up, and customer failures.
- Perform diagnostic and post silicon validation tests in the lab.
Minimum Qualifications:
- Bachelor's in Electrical or Computer Engineering and 12+ years of related work experience or a Master’s Degree in Electrical or Computer Engineering and 8+ years of related work experience.
- Prior experience with developing Micro-Architecture for blocks.
- Prior experience with Verilog/System Verilog.
- Prior experience with Clock Domain, Reset Domain Crossing issues, and Low-Power Design Techniques.
- Prior experience with simulators and waveform debugging tools.
- Prior experience working with Linting, Synthesis and Static Timing Analysis tools.
- Prior experience with Verification methodologies including experience developing testbenches, writing System Verilog Assertions and debugging Netlist simulations.
Preferred Qualifications:
- Experience with Networking technologies and concepts.,
- Experience with ARM protocols (AXI, CHI, APB. AHB) and exposure to ARM CPU’s is desirable.
- Design experience with Ethernet MAC, DDR/LPDDR, PCIE and DMA controllers is a plus.
- Experience with Integrating 3rd party IP’s into SoC is desirable
- Scripting experience (Python, Perl, TCL, shell programming) highly desirable.
- Experience with Emulation and Formal Verification tools is a plus.
משרות נוספות שיכולות לעניין אותך
