Nvidia Senior ASIC Design Engineer Memory Controller 

United States, California 

197696370

What You'll Be Doing:

• As a member of our Memory Subsystem Design team, you will collaborate with architects, software engineers, and circuit designers to and deliver an extraordinary solution. NVIDIA Memory controllers are among the industry's most sophisticated because of the many protocols that are supported and the stringent requirements of our high-end SOCs.

• You will work extensively with design and verification teams and take part in IP core and IP integration level RTL design, synthesis, functional verification, and timing analysis using groundbreaking CAD tools and using the latest process technologies.

• You will be responsible for the high quality release of the Memory Controller IP for SoC design, as per schedule. You will responsible for triaging release/integration issues into IP defects and get IP team's attention to it. You will provide feedback from previous release issues and track them back as IP abstraction enhancements.

What We Need To See:

• BS, MS, or PhD in Electrical Engineering, Computer Engineer, or related degree required (or equivalent experience).

• 5+ years of meaningful experience with all stages in the ASIC design flow including functional and formal verification, emulation, DFT, synthesis & timing analysis, power estimation and ECO.

• Experience in RTL development and verification with strong understanding of Verilog or VHDL.

• Exposure to Digital systems and VLSI design, Computer Architecture, Computer Arithmetic, CMOS transistors and circuits is required.

• Programming skills in C, PERL/Python.

• Good communication skills and interpersonal skills are required. A history of mentoring junior engineers and interns a huge plus.

Way To Stand Out From The Crowd:

• Experience in development of Memory Controller or PHY IPs.

• Knowledge of DDR /LPDDR DRAM protocols

• Prior experience in working with IP team and building scalable, efficient flow and processes.

• An eye for detail and ability to work with multi-functional teams to identify challenges and requirements and translate those into IP development items.