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Google SoC Design Engineer Google Cloud United States, California, Sunnyvale 187468732
19.11.2024
Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 3 years of experience with RTL coding using Verilog/SystemVerilog.
- Experience with industry-standard EDA tools for simulation, synthesis, and power analysis.
Preferred qualifications:
- Experience as a design lead or technical management of RTL engineers.
- Experience architecting RTL solutions employing software based construction, instantiation, customization and generation of RTL.
- Experience with SOC implementation standards and interfaces (e.g. AXI).
- Experience with scripting languages (e.g., Tcl, Python or Perl).
- Strong understanding of digital design fundamentals, including synchronous and asynchronous logic, state machines, and bus protocols.
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