Texas Instruments Kilby Labs RF Design Intern -- Phase Locked Loops 

United States, Texas, Dallas 

159082621

Responsibilities may include:

• Design of high performance phase locked loops (PLLs) using CMOS or Bi-CMOS technology, with focus on frac-N architectures
• System level analysis of frac-N architectures to determine achievable phase noise and jitter as well as bandwidth and settling behavior
• Circuit design of key blocks within Cadence, including voltage-controlled oscillators, phase detectors, loop filters, frequency dividers
• Verification of circuit design performance using Cadence tools (Schematic editor, Spectre simulation) and comparison to expected performance based on system analysis
• Layout and/or guidance of layout of key circuit blocks

Minimum Requirements:

• Currently pursuing Masters or PhD degree in Electrical Engineering or related field with RF and mixed signal IC design background
• Cumulative 3.0/4.0 GPA or higher

Preferred Qualifications:

• Experience with phase-locked loops design, including frac-N architectures
• Understanding of system level analysis including feedback, stability, transfer function analysis, noise analysis (including calculation of spectra)
• Understanding of mixed-signal circuit design, including amplifiers, voltage or current controlled oscillators, frequency dividers (high speed digital circuits), bias networks
• Familiarity with transistor-level CMOS and Bipolar circuit design as well as layout techniques for high speed circuits
• Familiarity with Cadence design tools, including Virtuoso Schematic Editor, ADE, Spectre
• Familiarity with system level design, analysis, and simulation tools, including Python, CppSim, Matlab
• Knowledge of prototype development, lab testing and debug
• Prior tape out experience of RFIC and mixed-signal designs in CMOS or Bi-CMOS technologies