What You'll Do- Establish and maintain effective communication with vendors to ensure seamless integration of sensors into product designs.
- Collaborate with multi-functional teams to integrate sensors into design frameworks, ensuring compatibility and performance standards are met.
- Work closely with design and Synopsys Design Constraints (SDC) teams to align project objectives and work, facilitating a cohesive development process.
- Participate in post-silicon verification processes, analyzing data and test results to validate the performance and reliability of the final product.
- Provide technical leadership and mentorship to team members, ensuring they have the support and resources needed for success.
Minimum Qualifications:- BS/MS in Electrical Engineering, Computer Science, or any related field.
- 10+ years of experience in ASIC design.
- Knowledge of Silicon Lifetime Managements IP, their usage, and verification specs.
- Experience with simulators, synthesis, static timing constraints, and tools.
- Strong interactive and waveform debug skills.
- Excellent English verbal and written communication skills.
Preferred Qualifications:- Experience in block-level synthesis, place and route, timing closure.
- Scripting experience (Python, Perl, TCL, shell programming).
- Experience in Verilog/System Verilog programming.
- A good understanding of verification methodologies and flow.
- Self-motivated, able to work independently or as a great teammate.
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