

You Are
Your responsibilities will include but not be limited to:
Adding support for new features/IPs into existing emulation models
Learning architecture and microarchitecture by debugging failures to the root cause
Developing high level (for example, C++/Python) modeling for RTL components
Developing and utilizing various debug and validation tools and/or methodologies to implement validation plans with the goal being to ensure a solid design
Building multiple emulation targets for an SoC
Participating in the debug of failures on silicon and developing new testing strategies to detect these failures on RTL models
System level validation tasks such as using evaluation boards and FPGAs
SOC level feature enabling/debug
The ideal candidate should exhibit the following behavioral traits:
Problem-solving skills
Ability to multitask
Strong written and verbal communication skills
Ability to work in a dynamic and team-oriented environment
You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
The candidate must have a Bachelor’s Degree in Computer Science, Computer Engineering or Electrical Engineering with 3+ years of relevant experience -OR- Master’s Degree in Computer Science, Computer Engineering or Electrical Engineering 2+ years of relevant experience
Preferred Qualifications
Experience with reading and interpreting technical specs and Register Transfer Level (RTL) code
Experience with validation or testing experience, especially in a silicon design team
Experience with UNIX or Linux
Experience with IA-32 assembly and/or Verilog programming experience
Experience writing BFMs
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.משרות נוספות שיכולות לעניין אותך

You Are
Your responsibilities may include but not be limited to:
SoC, clock design, and power delivery integration
Drive performance optimization, including co-optimization work with process teams, to create best-in-class designs.
Physical synthesis, place and route, and clock tree synthesis with Synopsys or Cadence tools.
Static timing analysis constraint understanding and generation, clock stamping, and timing closure.
Multiple Power Domain analysis using standard Power Formats UPF or CPF.
The ideal candidate will exhibit behavioral traits that indicate:
Self-motivator with strong problem-solving skills
Excellent interpersonal skills, including written and verbal communication
Ability to work as part of a team and collaborate in a high-paced
You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
Bachelor’s Degree in Electrical Engineering, Computer Engineering or a related field with 6+ years of relevant experience -OR- Master’s Degree in Electrical Engineering, Computer Engineering or a related field with 4+ years of relevant
Preferred Qualifications
6+ years of experience in backend design and/or integration product development and delivery on leading edge process nodes
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
משרות נוספות שיכולות לעניין אותך

Analyzes and/or optimizes cross/full stack software to enable energy-efficient Intel client platforms.
Applies expertise in both software and hardware to optimize power and performance on client.
Understands partner and customer software stacks and engages as a trusted technical advisor to discover opportunities to showcase value of Intel technology and platforms aligned with mutual roadmap. May also analyze and benchmark a platform, including power, performance, responsiveness, development of KPIs/KEIs, and/or system level measurement methodologies as part of platform and software optimization.
May act as the voice of the partner/customer software stack to influence Intel platform/technology roadmap.
Behavioral traits that we are looking for:
Willingness to work on ambiguous but challenging problems
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Requirements:
Bachelors in Computer Engineering, Electrical Engineering or related field with 9+ years of relevant experience OR
Masters degree in Computer Engineering, Electrical Engineering or related field with 6+ years of relevant experience OR
PhD in Computer Engineering, Electrical Engineering or related field with 2+ years of relevant experience.
Relevant Experience in:
Experience in Windows OS, multi-year experience in analyzing software stacks on Windows using ETW traces etc.
Experience in common AI software stacks like ORT, DML etc., experience in working with drivers for AI accelerators - GPU/NPU.
Preferred Qualifications:
Familiarity with Windows power management and power management concepts like DVFS, ACPI states etc.
Knowledge of computer architecture and familiarity with modern SoC architecture
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and orschoolwork/classes/research.
Experienced HireShift 1 (United States of America)US, Oregon, HillsboroWeoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
משרות נוספות שיכולות לעניין אותך

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
משרות נוספות שיכולות לעניין אותך

In this exciting role, your responsibilities may include but not be limited to:Validation of an IP or feature, either directly or at the system level.
Creating plans and tests for validating portions of a complex microarchitecture using written specs, RTL code and other tests as a guide.
Learning the architecture and microarchitecture by debugging failures to the root cause
Developing and utilizing various debug and validation tools and/or methodologies to implement validation plans with the goal being to ensure a solid design.
Participating in the debug of failures on silicon and developing new testing strategies to detect these failures on RTL models.Developing tools and methods to streamline IP development and SOC integration to deliver highest quality in shortest time possible.
Developing debugging tools and software.
The validation engineer should possess the following behavior attributes:
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
What we need to see (Minimum Qualifications):
Preferred Qualifications:
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and orschoolwork/classes/research.
Our total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to
Experienced HireShift 1 (United States of America)US, Oregon, Hillsborooffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
משרות נוספות שיכולות לעניין אותך

Your responsibilities may include but not be limited to:
Performing physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
Physical Synthesis, Floor planning, Place and Route, Clock Tree Synthesis with Synopsys and/or Cadence EDA tools.
Multiple Power Domain analysis and handling using standard Power Formats UPF or CPF.
Verification and Signoff including Formal Equivalence Verification, Static Timing Analysis, Reliability Verification, Static and Dynamic power integrity, Layout Verification, Electrical rule checking, Noise analysis and Structural Design checking.
Analyzes results and makes recommendations to fix violations for current and future product architecture.
Participating in the development and improvement of physical design methodologies and flow automation.
Driving performance optimization, including co-optimization, work with process teams, to create best-in-class designs.
The ideal candidate should exhibit behavioral traits that indicate:
Self-motivator with strong problem-solving skills.
Excellent interpersonal skills, including written, verbal, and presentation communications.
Attention to detail and organizational skills.
Ability to work as part of a team and collaborate in a high-paced atmosphere.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Bachelor's degree in electrical engineering, Computer Engineering or related field with 5+ years of relevant experience OR
Master's degree Electrical Engineering, Computer Engineering or related field with 3+ years of relevant experience
The relevant experience would include one of the following areas:
Physical synthesis, place and route, and clock tree synthesis with Synopsys or Cadence tools.
Static timing analysis constraint understanding and generation, clock stamping, and timing closure.
Multiple Power Domain analysis using standard Power Formats UPF or CPF.
Preferred Qualifications:
6+ years of experience in physical design using industry EDA tools.
7+ years of experience in backend design and/or integration
Product development and delivery on leading edge process nodes
Experience in Python/Perl/TCL programming languages
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
משרות נוספות שיכולות לעניין אותך

Key Responsibilities:
PnP Staff member, technical expert leading the design power convergence.
Develop, maintain, and support tools, flows, and methodologies within the power convergence domain.
Develop new power and performance modeling tools, enhance modeling capabilities and drive innovation.
Drive power reduction and RTL and SD design optimization through different phases of product development stages (from pathfinding to silicon).
Identify and validate correct simulation tests to use for power analysis and optimization.
Setting aggressive power targets and driving execution for the design to achieve them.
Perform workloads and hardware characterization.
Define new power/performance technologies and features.
The engineer should possess the following behavior attributes:
Self-motivated and possesses strong leadership qualities.
Willingness to create and drive concepts to innovative solutions.
Clear and effective technical communication, both verbal and written.
Analytical and problem-solving skills.
Strong problem-solving skills and attention to detail.
In this highly visible role, excellent communication and presentation skill.
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
What we need to see (Minimum Qualifications):
B.Sc. / M.Sc. /PhD in Electrical Engineering, Computer Engineering, or a related field.
5+ years’ experience with Circuit, logic design or integration
2+ years’ experience with RTL or SD design power optimizations.
How to Stand Out (Preferred Qualifications):
Strong knowledge of power reduction and optimization techniques.
Good understanding of Validation and test concepts.
Proficiency in developing and maintaining tools, flows, and methodologies.
Experience with performance analysis and competitive assessment.
Advanced understanding of SoC behavior and power modeling.
Familiarity with architecture, design, post-silicon, and architecture platform processes.
Knowledge of uArchitecture, RTL, Validation, Structural Design (SD)
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and orschoolwork/classes/research.
Our total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to
Experienced HireShift 1 (United States of America)US, Oregon, HillsboroWeoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
משרות נוספות שיכולות לעניין אותך

You Are
Your responsibilities will include but not be limited to:
Adding support for new features/IPs into existing emulation models
Learning architecture and microarchitecture by debugging failures to the root cause
Developing high level (for example, C++/Python) modeling for RTL components
Developing and utilizing various debug and validation tools and/or methodologies to implement validation plans with the goal being to ensure a solid design
Building multiple emulation targets for an SoC
Participating in the debug of failures on silicon and developing new testing strategies to detect these failures on RTL models
System level validation tasks such as using evaluation boards and FPGAs
SOC level feature enabling/debug
The ideal candidate should exhibit the following behavioral traits:
Problem-solving skills
Ability to multitask
Strong written and verbal communication skills
Ability to work in a dynamic and team-oriented environment
You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
The candidate must have a Bachelor’s Degree in Computer Science, Computer Engineering or Electrical Engineering with 3+ years of relevant experience -OR- Master’s Degree in Computer Science, Computer Engineering or Electrical Engineering 2+ years of relevant experience
Preferred Qualifications
Experience with reading and interpreting technical specs and Register Transfer Level (RTL) code
Experience with validation or testing experience, especially in a silicon design team
Experience with UNIX or Linux
Experience with IA-32 assembly and/or Verilog programming experience
Experience writing BFMs
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.משרות נוספות שיכולות לעניין אותך