דרושים Silicon Packaging Architect ב-אינטל ב-מלזיה

Job Description:

• Translates product requirements into package architecture specification, drives end-to-end package solutions for physical, electrical, and cost requirements.
• Leads technology tradeoff decisions ensuring silicon packages conform to electrical, mechanical, thermal, and reliability standards, specifications, and landing zones.
• Collaborates with silicon, hardware, and package leads to ensure high quality package output and aids in removing roadblocks.
• Oversees end-to-end package development process, including design, processes, and procedures and continuously improves packaging quality standards and targets.
• Applies expertise in package design troubleshooting, resolves new and existing packaging problems involving designs, materials, and processes and provides innovative and cost-effective solutions.
• Collaborates with manufacturing team to ensure the packaging design and tape-out seamlessly transition to production.

Qualifications:

• Bachelor Degree in relevant engineering/science domain with minimum 10 years of experience in the package design and/or architecture.
• Prior leadership role in package technology readiness development, design tape-out and/or innovation.

Experienced HireShift 1 (Malaysia)Malaysia, Penang

Job Description:

• Defines and drives critical power and performance requirements and analysis of microbenchmarks and full end to end solutions on competitive platforms.
• The role will require to understand performance implications of various use cases on competitive platforms to provide product positioning and inform future Intel architecture. These use cases may include CPU, Gfx, AI, and End-to-end solutions. The role will involve running microbenchmarks that are CPU, Gfx, or AI specific, collecting data, and analyzing the performance.
• The role will include developing potential methods to analyze platform power and performance, important use cases, and relevant workloads to identify power and performance bottlenecks and opportunities.
• Collaborates with architecture, design, and validation teams to provide platform power and performance analysis to project to set performance targets, drive power and performance methodology, and benchmarking for competitive platform using relevant workloads.

Minimum Qualifications: • Bachelor's in Computer Science, Computer Systems, or related engineering degrees. • Experience with benchmarks for various technologies (CPU, Gfx, and AI) • 3 years of related experience Preferred Qualifications: • Power and Performance experience • Experience with benchmarking different end to end solutionsExperienced HireShift 1 (Malaysia)Malaysia, Penang

Minimum Qualifications:To be considered for this position, you must meet the following minimum qualifications:- Bachelor's or Master's degree in Materials Science, Chemistry, Chemical Engineering, Mechanical Engineering, or a related field.- At least 2 years of experience applying Model-Based Problem Solving (MBPS) in a professional setting.- At least 2 years of experience communicating with stakeholders, including strong presentation and clear communication skills.Preferred Qualifications:The following qualifications are not required but will be considered a plus in identifying top candidates:- Knowledge and application of Statistical Process Control (SPC) and/or Design of Experiments (DOE).- Strong analytical skills and the ability to work effectively in ambiguous situations.- Familiarity with semiconductor assembly and packaging processes and materials, including wafer-level packaging.- Experience in supply chain or supplier management, particularly with suppliers based in East Asia.Experienced HireShift 1 (Malaysia)Malaysia, PenangMalaysia, Kulim

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Description:

Packaging Module Development Engineer within Chip Attach Module/SLI Assembly Module (CAM/SLAM) in Assembly Test Technology Development (ATTD) as part of ATTD in Asia initiative.

CAM/SLAM Process covers: Chip Attach, Component Attach and Solder Ball Attach

• Candidate will focus on Process & Technology Development for New Product (NPI), Shuttle Program, Test Vehicle & IFS Product.
• Technical knowledge in Research & Development (R&D), Process Development, Process Engineering, Design of Experiment (DOE), Statistical Process Control (SPC), Failure Modes/Effects Analysis (FMEA), Quality, Yield Improvement, Optimization
• Pathfinding, developing, qualifying, and ramping materials to transfer to high volume manufacturing process in factories.
• Develops process specifications applying principles for design of experiments and data analysis, and documents improvements through white papers.
• Optimizes and improves the efficiency of manufacturing of packages, developing processes to meet quality, reliability, cost, yield, productivity and manufacturability requirements.
• Conducting fundamental studies and performing experiments to characterize materials, process, identify potential failure modes, understand the performance interactions, optimization, assess feasibility of technology use on product, and make technology recommendations.
• Collaborating closely with other cross-functional team to build material technologies on test vehicles and products and assessing their performance.

Qualifications:

• BEng/MSc/PhD degree in relevant engineering disciplines (Mechanical, Materials, Chemical, Electrical);MSc & PhD is preferable.
• Min. 5 years in semiconductor assembly equipment and process; 8 Years experience and above are preferred.
• Excellent influencing, written and verbal communication skills.
• Strong data analysis capabilities and problem-solving skills.
• Proactive and positive approach towards challenges. Able to work under tight timelines and perform under pressure.

Experienced HireShift 1 (Malaysia)Malaysia, Kulim

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

The position is for Package Module Development Engineer for direct lid/stiffener attach module as part of ATTD (Assembly and Test Technology Development) in Asia initiative. The candidate will define and establish process flow, conduct FMEA assessment, procedures, drawings review and equipment configuration for NPI products. Selects and develops material and equipment (recipe, collaterals based on design rules) and drives improvement for the process to meet quality, reliability, cost, yield, productivity and manufacturability requirements over variables such as material, method, equipment, environment and operating personnel. Plans and conduct experiments to fully characterize the process throughout the development cycle. Develops solutions to problems utilizing formal education, statistical knowledge, and problem-solving tools. Candidate will also participate in pathfinding activities including new TIM (thermal interface material) qualification with regards to thermal performance, new failure mode characterization and resolution.
Qualifications:

Minimum Qualifications:

• Bachelor’s/Master's degreein a relevant science, engineering, and technology fields (Physics, Mechanical, Chemical, Electrical, Electronic and Materials Engineering related field).
• Min. 2 years in process development and equipment engineering in semiconductor field.
• Involvement in research and development in assembly and packaging.
• Knowledge in statistical design of experiments and problem-solving techniques.

Preferred Qualifications:

• 4 years+ experience preferred in process development and equipment engineering in semiconductor field.
• Experience in lid/IHS (integrated heat spreader), stiffener attach and dispensing process.
• Data science/statistical tools experience (JMP/SQL) and AI/ML knowledge is a plus.

Experienced HireShift 1 (Malaysia)Malaysia, Kulim

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Job Description:

In this position, you will be involving in the training, design and development of next generation SOC/CPU for wide range of Intel products. Your responsibilities will include some of the following but not limited to:

• Assist design unit owner in Register Transfer Level RTL model functional validation.

• Use CAD tool extensively to simulate logic behavior and circuit performance and direction of physical design for next generation, deep sub-micron embedded circuit solutions.

• Verify the circuit behavior against the original simulation model and first silicon.

• Define VLSI Structural Design methodology and developing design flows.

• Implement structural physical designs, such as synthesis, floor planning, power-grid and clock tree designs, timing budgeting and closure, place and route, RC-extraction and integration.

• Verify structural physical designs, such as functional equivalency, timing/performance, noise, layout design rules, reliability and power.

• Develop Analog IP on next generation deep submicron process for the Intel's SOC, perform tasks related to Very-large-scale integration VLSI complementarymetal-oxide-semiconductorCMOS IC design, Solid state physics and physical layout. Such tasks may include Circuit design of high-speed clocking related circuits [phase-locked loop PLL, delay-locked loop DLL, bandgap] or high voltage input/output IO [double data rate DDR/LPDDR, General-purpose input/output GPIO, OPIO].

• Responsible for Integration of Third-party IPs -- Synthesis, functional and/or timing convergence, and pre- and post-si debug of IPs developed by various external vendors as well as within the company.

• Handling of signals crossing power planes and clock domains, industry standard protocols including hardware and software details dealing with Memory LPDDR, storage eMMC, SATA, UFS, peripherals PCIe, USB, and MIPI interfaces in SOC devices.

• System integration dealing with Si/ Platform/ FW/ MW/ drivers/ OS/ Apps on Android Windows-based tablets and phones.

Qualifications:

You must possess a Bachelor of Engineering degree or a Master of Science degree in Electronic, Electrical or Computer Engineering. Additional qualifications include:

• Familiarity with Very Large-Scale Integration VLSI Complementary Metal-Oxide Semiconductor CMOS logic circuit design

• Well versed in UNIX, C programming and relevant Computer Aided Design CAD tools.

Shift 1 (Malaysia)Malaysia, PenangMalaysia, Kulim

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

Responsibilities and scopes may be quite diverse depending on the function or project assigned. The industrial exposure and technical skill learned will enhance the students knowledge and experience for their future career undertaking.This internship is only open for the undergraduate student who has taken the Advanced Packaging Flagship Curriculum and required to undergo the internship program by USM academic plan.Student / InternShift 1 (Malaysia)Malaysia, Kulim

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.