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Google Design Verification Silicon Engineer United States, California, Mountain View 936684346
14.07.2025
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 1 year of experience with verifying digital logic at RTL using SystemVerilog or Universal Verification Methodology (UVM).
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience in low-power design verification.
- Experience developing and maintaining verification testbenches, test cases, and test environments.
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