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Apple RFIC Design Engineer United States, California, San Diego 990081399
18.11.2024
Description
As an RFIC Design Engineer, you will be responsible for providing RFIC solutions for wireless SoC and driving them to mass production for Apple’s Wireless Connectivity products. Responsibilities include: - Led design of radio transceiver chains, including TX, RX, and PLL-LOGen for wireless connectivity products.- Drive radio KPI (power, area, performance) to meet product requirements.- Work closely with RF Systems in block level and high level specifications of the TX and RX line ups and PLL-LOGen, and accurate distribution of spec margins in the chain.- Hands-on design contributions, starting from concept, architecture, and topology to transistor-level feasibility studies and KPI trade-off analysis to actual design, simulations, and extractions.- Design of RF and Analog loopbacks for calibration and compensation.- Work through Co-Existence scenarios and design to meet the CoEx requirements.- Be responsible for the floorplan layout and verification of the design to ensure a successful tape-out.- Provide design versus silicon measurements correlation and compliance with specifications for volume production.
Minimum Qualifications
- BS and 10+ years of relevant industry experience.
- Shown RF/analog and mixed-signal design experience in groundbreaking RF CMOS design.
- Strong understanding of analog design concepts such as analysis of noise, linearity, mismatch, stability, and other analog impairments.
- Experience in Cadence Virtuoso, Spectre RF, Matlab, EM simulation (EMX, HFSS), and similar tools.
- Direct experience in designing and bringing wireless transceivers into mass production in deep sub-micron RFCMOS technology.
- Experience should also include understanding DFT and DFM techniques for mass production environments.
Preferred Qualifications
- MSEE and PhD plus relevant industry experience.
- Solid Understanding of the impact of modulation type on radio architecture and requirements.
- Validated capability to work with digital design group for an optimum partition between digital and analog domains.
- Familiarity with the integration flows and challenges of wireless SoCs.
- Good understanding of desense and can work with board RF/HW/Antenna teams to optimize board/module layouts for desense mitigation.
- Familiarity with mixed-signal mode verification methodology (SystemVerilog, AMS, Nanotime).
- Extensive experience in Silicon characterization and debugging.
- Ability to drive strong production test/QA methodologies.
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $166,600 and $296,300, and your base pay will depend on your skills, qualifications, experience, and location.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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