Intel Performance/Power Optimization Product Engineer Intern 

United States, Texas 

984780723

our technology offerings, contributing to the advancement of semiconductor design.

In this role, youresponsibilities will include:

• Analyze customer feedback and requirements toidentifyareas for improvement in the 14A Technology node offering.

• Collaborate with cross-functional teams to enhance design collateral offerings, including PDK, PNR, and PPA.

• Develop strategies tooptimizepower consumption, performance metrics, and area efficiency in semiconductor designs.

• Conduct research and apply advanced techniques to improve the usability and effectiveness of design tools.

• Present findings and recommendations to stakeholders to drive continuous improvement in product offerings.

• Run and analyze Ring Oscillators (RO) or Place and Route (PNR) studies toestablishtechnology node value.

You mustbelow minimum education requirementsand minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience.preferred qualifications are in addition to therequirements and are considered a plus factor in

Minimum Qualifications:

• Pursuing aMaster's Degree in Electrical Engineering, Electronics and Communication Engineering, or a related STEM field.

• Analyzing andoptimizingdesigns to improve power consumption, performance metrics, and area efficiency using synthesis or PNR tools

• Creating andoptimizingcustom integrated circuits, particularly in analog, mixed-signal, and RF domains.

Preferred Qualifications:

• in SRAM design or standard cell design.

• IR drop analysis, STA, leakage recovery, or other signoff domains.

• Experience running ring oscillators or other spice simulations.

• Experience running place and route (P&R) tools.