Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering system-level IP to measure performance across multiple projects.
What you'll be doing:
Be an integral part of the team defining, developing, and delivering system-level methodologies and RTL to measure performance on the industry's leading GPUs and SOCs.
Learn and contribute to the development and automation of flows and methodologies to efficiently build, deliver, and support a system-level IP.
Support projects by applying the performance monitoring system under the guidance of senior engineers.
Learn and run RTL checks to ensure design quality (e.g., cross clock domains (CDC), clocks, reset, latency, and more).
Design and implement RTL features (microarchitecture and RTL) with mentorship from experienced engineers.
Work with architects, designers, and software engineers to accomplish your tasks.
What we need to see:
Completing a Master's degree (or equivalent experience) in Electrical or Computer Engineering, or a Bachelor's degree with 6+ months of relevant experience.
Strong academic background in digital design and computer architecture.
Programming experience in Python or other scripting languages.
Knowledge of RTL design (Verilog) and digital design concepts.
Understanding of basic SOC architecture concepts.
Excellent problem-solving and analytical skills.
Proven teamwork and communication across multiple teams.
You will also be eligible for equity and .
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