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Intel Global Yield FEOL Front-End-Of-Line Process 
Taiwan, Taiwan Province, Hsinchu 
96922416

24.06.2024

Sr. FEOL Integration Development Engineer's responsibilities include (but not limited to):

  • Own engineering projects to execute HVM yield roadmap, device targeting and attain performance targets.
  • Collaborate with Technology Development and Local Yield teams to import new technology to production fabs.
  • Work with FEOL/BEOL Integration, Device, Defect Reduction and Yield Analysis team members to identify root cause of yield/performance issues and implement mitigation plan in defined timeline to meet committed production yield/performance targets and to support fast paced yield ramp-up in high-volume manufacturing phases.
  • Perform feasibility studies, plan and conduct experiments to fully characterize the process throughout the development cycle and to improve performance for each specific product.
  • Own NPI (New Product Introduction) in production fabs and perform product-specific process optimizations to meet foundry customers specifications and requirements.
  • Own engineering projects in partnership with Local Yield teams to improve product yield, quality, device performance and to reduce wafer cost.
  • Engineering support for technical interactions with internal and external customers.

Minimum Qualifications:

  • Bachelor's Degree in Electrical Engineering, Physics, Chemistry, Materials Science or in a STEM related Field
  • 9+ years of experience in advanced node semiconductor industry in FEOL Process Integration in one (or more) of the following segments: Fin, Gate or PC, Spacer/Source-Drain or Junctions, RMG (Replacement Metal Gate), or Contact / MOL (Middle of the Line).
  • Experience on Device Physics and in advanced nodes FinFET technology, GAA (Gate-All-Around) in development or high-volume manufacturing.
  • Experience with processes including lithography, dry etch, wet etch, CMP, diffusion, implant, thin films and metrology.


Preferred Qualifications:

  • Advanced degree (Master's or Ph.D.) in Electrical Engineering, Physics, Chemistry, Materials Science or in a STEM related Field.
  • Experience in project/program management and/or Task Force Team lead.
  • Experience at leveraging big data analysis to identify process design weaknesses and/or manufacturing weaknesses in order to propose corrective, data-based solutions.
  • Experience in extracting insights from structured and unstructured data by quickly synthesizing large volumes of data and applying statistics and machine learning.
  • Experience in new semiconductor technology development.
  • Experience in Statistics and Machine Learning.

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits