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FEOL (Front-End-Of-Line) Integration Development Engineers are
responsiblefor:
Leading engineering projects to execute high-volume manufacturing (HVM) yield roadmaps and achieve performance targets.
Collaborating with Technology Development and Local Yield teams to implement new technologies in production fabs.
Working with FEOL/BEOL Integration, Device, Defect Reduction, and Yield Analysis teams to identify root causes of yield and performance issues and executing mitigation plans within set timelines.
Conducting feasibility studies and experiments to characterize processes and enhance product performance throughout development.
Managing New Product Introductions (NPI) in production fabs and optimizing processes to meet foundry customer specifications.
Partnering with Local Yield teams to improve product yield, quality, performance, and reduce wafer costs.
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
MinimumQualifications:
Bachelor's degree in a relevant science or engineering field, with at least 4 years of experience.
Experience in advanced node semiconductor industry, specifically in FEOL Process Integration; level of experience will influence job grade.
Proficient understanding of Device Physics, with experience in FinFET or Gate-All-Around technology development or high-volume manufacturing.
Familiarity with module processes such as lithography, dry etch, wet etch, CMP, diffusion, implant, thin films, and metrology.
Strong problem-solving skills, self-initiative, and ability to learn independently.
Ability to collaborate effectively with multi-functional and multi-cultural teams.
Excellent communication skills.
PreferredQualifications:
Advanced degree (Master's or Ph.D.) in Electrical Engineering, Physics, or Materials Science; related fields may be considered based on industry experience.
Experience in project/program management and/or as a TFT lead.
Strong interpersonal skills, including the ability to influence and motivate others.
Experience engaging with external foundry customers through technical interactions.
Familiarity with GAA (Gate-All-Around) technology architecture.
Background in new semiconductor technology development. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and orschoolwork/classes/research.
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and orschoolwork/classes/research.
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