מציאת משרת הייטק בחברות הטובות ביותר מעולם לא הייתה קלה יותר
We are seeking an innovative CAD Software Developer with particular interest in algorithms for RTL analysis (using Verific in C++), netlist traversal, DFT, clock distribution, power gating, and other SOC integration challenges. Understanding both software and hardware principles is key. Constant creativity and a self-drive to explore and perfect fast, high capacity software is required. If you like to work across many technical areas and see your successes directly realized in the world's best AI hardware, this is it! Developing software within a leading hardware company also means getting to almost exclusively focus on the latest processes and most advanced designs. We're not bogged down by legacy support, niche roles, or convoluted approval processes. Our developers enjoy unusually high intellectual freedom and the ability to explore broad roles.
What you’ll be doing:
Invent and optimize new methods for SOC/IP integration tools.
Develop algorithms to allow designers to efficiently create, review, and optimize chip-level connectivity.
Devise strategies for rapidly analyzing the impact of floorplanning changes on bus latencies, DFT, clocking, and power delivery.
As with any software engineering team, we do write a lot of code, but this is broader than a typical CAD or EDA role. Instead, we as a team own the whole process from discovery and invention of new optimization opportunities, to developing solutions and working directly inside design teams to facilitate deployment. That translates to a bigger picture view of your work and not simply responding to user requests, but instead actively driving the roadmap of increasing hardware design productivity.
What we need to see:
BS, MS, PhD in Electrical Engineering or Computer Science or equivalent experience
6+ years of relevant experience in CAD software and VLSI hardware design
Demonstrated ability in software development with C++
Strong understanding of efficient software data structures and algorithm development for graph traversal, pattern matching, abstract syntax trees, and parsing
Good understanding of SOC-related topics, including Verilog, scan chain insertion, MBIST, clock and power distribution, and bus architectures
Some familiarity with related EDA and optimization techniques, such as logic synthesis, ATPG, global route, static timing analysis, linear programming, and SAT solvers
Strong communication and interpersonal skills
Ways to stand out from the crowd:
C++14 or newer experience, such as lambdas and concurrency
Previous work experience including both software and hardware roles, especially involving SOC/IP integration or RTL design experience
Experience with common EDA building blocks, such as Verific for Verilog parsing, SAT solvers for formal verification, and combinatorial optimization frameworks for design
Experience in high performance software design including multithreading, distributed computing, efficient memory and I/O use, etc.
In general, an obsession with performance and the practical skills to build highly innovative software for world leading hardware
You will also be eligible for equity and .
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