Microsoft Senior Silicon Engineer 

Taiwan, Taoyuan City 

957538707

• BS and/or MS in Electrical Engineering or equivalent degree
• 8+ years of Design Verification experience
• Experience in System Verilog/UVM based testbench environment.
• Self-motivated and able to work effectively both independently and in a team.

As a Senior Silicon Engineer in the Data Processing Unit team, you will be validating silicon to solve complex problems in a datacenter. You will interact with the architecture team to develop a programmable silicon implementation. This position is expected to be highly visible and impactful. The vast breadth of domains required to build our DPU silicon gives the perfect opportunity to experience different areas of expertise. The depth required to solve complex engineering problems utilizes your experience and provides you with the perfect platform to shine and grow to the next stage in your career.

Detailed Responsibilities:

• Develop SystemVerilog/UVM based testbench.
• Work with vendors and IP providers to integrate their IP into testbench
• Develop and maintain test plans, test cases, and test scripts
• Execute test plans and analyze results
• Work closely with architecture, design and verification teams to ensure successful tapeout
• Participate in design and verification reviews
• Participate in the development of verification strategies and plans