מציאת משרת הייטק בחברות הטובות ביותר מעולם לא הייתה קלה יותר
Google Physical Design Engineer Static Timing Analysis Google Cloud United States, California, Sunnyvale 946092535
09.06.2025
Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, a related technical field, or equivalent practical experience.
- 3 years of experience in static timing (e.g., full chip timing signoff ownership, constraint authoring and verification, full chip static timing analysis and timing ECO creation, timing margins).
- Experience with EDA tools (e.g., Primetime, Tempus, Timevision, STAR-RC) and Tcl (e.g., commands for timing analysis, timing closure, parasitic extraction, noise glitch, crosstalk).
Preferred qualifications:
- 7 years of experience in the domain of static timing analysis.
- Experience leading one or more aspects of physical design or physical design flow/methodology, to successful tape-outs and shipping silicon.
- Experience in extraction of design parameters, QoR metrics, and analyzing data trends.
- Knowledge of semiconductor device physics, SPICE simulation and complex static timing topics, including complex clocking, timing exceptions, time budgeting, IO interface timing, ECOs, and constraint verification.
משרות נוספות שיכולות לעניין אותך
