Bachelor's/Master's in Hardware Engineering or Electrical/Electronics Engineering or Computer Engineering or Computer Science with 10+ years of related work experience.
Candidate must have high degree of hardware architecture/ microarchitecture experience in CPU/SoC/Chipset and a few of the subsystems/areas given below
Strong knowledge and skills of Intel IA (IA32 architecture with uArch debug knowledge of Intel's Core and Uncore or equivalent architecture.)
Passionate about working on CPU hardware and enjoys various levels of debugging
Good data analysis skills and attention to details, Patient and disciplined problem-solving skills
Expertise in CPU bring up, system level debug, root cause isolation, debug methodology and tools
Knowledge of SOC level flows and deep understanding of some of the domains - CPU core, IOs, Coherency, reset, Power management, virtualization
Understands System HW/FW/SW as a whole
Excellent failure boundary minimization skills Must possess strong initiative, analytical/problem solving skills, team working skills, ability to multitask and be able to work within a diverse team environment.
Optimizes debug process and drives systematic improvements in debug methods, tools and features based on expertise and debug findings.
Hands-On experience of complex SoC sightings and exposure to running cross-team/site Task forces
Knowledge on Debug Tools for JTAG, on chip trace features and ability to debug via OSC/LAs etc; Usage of any Post-Si debug tools (e.g., logic analyzers, oscilloscopes, things like ChipScope on FPGA's, etc.), usage of different Analysers/exercisers (PCIe etc.)
Good working knowledge in C/C++/Python SW programming for content development and scripting
Demonstrated collaboration skills working with different partner teams like design, architecture, firmware, tools, manufacturing teams during complex failures debug
Excellent written and oral communications and experience working in a cross functional /cross geography team environment are essential