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Apple RFIC Layout Engineer United States, California, Irvine 906900960
07.04.2025
As an RF IC Layout Engineer, you will be a key member of a RFIC team, researching, designing and bringing the next-generation of wireless technologies into high-volume production in advanced CMOS technology nodes. Responsibilities include: • Detailed transistor-level layout of RF and analog circuit blocks including LNA, mixers, PLL, LO generation, modulators, power amplifiers, ADC/DAC, baseband filters, and bandgap/bias/LDO. • Block level layout through full verification flow including extraction, DRC, LVS, and DFM checking. • Co-work with designers on block level floorplanning. • Layout review for power/gnd routing, electromigration, signal path check, differential and IQ matching, and signal coupling.
- BS and 10+ years of relevant industry experience.
- FinFet experience.
- Experience in custom RF/analog layout for radio transceivers with extensive knowledge of deep sub-micron CMOS.
- Knowledgeable in layout techniques for device matching, minimizing parasitics, RF shielding, and high frequency routing.
- Solid understanding of RC delay, electromigration, and coupling.
- Understanding of guard rings, DNW, PN junctions, and advanced process effects such as LOD, WPE, etc.
- High level proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc. in FinFet Technology.
- Knowledge of CADENCE layout tools.
- Excellent communication skills and ability to work with cross-functional teams.
- Capability to lead other layout engineers for top-level integration.
- Ability to recognize failure prone circuit and layout structures and proactively work with circuit designers for the best approach to resolve problems.
- Scripting skills in PERL or SKILL.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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