Qualcomm RF/Analog Design/Mixed-Signal Engineering Internship – Summer 

United States, California 

901757904

Job Area:

Interns Group, Interns Group > Interim Engineering Intern - HW

As anyou'll have the opportunity to push the boundaries of what exists and establish the new standards for tomorrow. Project opportunities span 5G/6G mmWave, RF System Design, Transceiver performance analysis and optimization, RFIC / Analog IC Design, PA architectures, RF Front-End Engineering, Signal Processing/Integration, RF microwave design, power amplifiers, WLAN / Blue Tooth LNAs, ADC / DAC, etc.

Minimum Qualifications

• Currently enrolled in a bachelor’s, master’s, or Ph.D. degree program in computer engineering, computer science, electrical engineering, or a related field

• Must be available for 11 – 14 weeks during Summer 2025 (May-September) with a graduation date of December 2025 or later

Preferred Qualifications

• Candidates actively pursuing a degree with an anticipated graduation within the upcoming year preferred Dec 2025 to June 2026.

• Currently enrolled in a master’s or Ph.D. degree program in computer engineering, electrical engineering, or a related field

• Candidates with academic or professional experience in one or more of the following:

RF/Analog Design

• RF, microwave theory, antenna theory

• Analog IC Design or RFIC Design

• linear systems & Filter Design

• Digital Pre-Distortion

• RF Matching Network

• S-Parameters

• Digital Communication systems

• Noise Figure, Linearity (IP3)

• Impedance Matching

• Printed Circuit Board design

• Transmission Lines,

• Power Amplifiers, Transmitter, Receiver, ACLR

• Layout experience and chip tape-out

• Programming Experience in Perl, MATLAB, Cadence, HFSS

MIXED-SIGNAL

• Mixed signal IP and high speed interface (ADC/DAC, PLL, Sensor, Serdes, DDR, etc.) architecture definition, design, implementation (using standard ASIC flow), and SoC integration

• RTL coding, lint checks, CDC checks, DFT updates, formal equivalency checks, and ECO implementation

• Static timing analysis and optimization of high-speed critical paths and complex mixed-signal IPs

• Cadence Design Environment

• Low power analog/digital design

• Perl, Verilog, Shell, Python, Tcl, SystemVerilog

It’s important to note that this is not a job posting for a specific role.We will review resumes on an ongoing basis and a recruiter may reach out to you.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range:

$0.00 - $98.00