Intel IP Logic Design Engineer 

United States, Texas 

898664084

Job Description:

This position is an IP Logic Design Engineer role in the Edge Acceleration IP group (EAIG), within the IP, Security and Client Product Group (ISCP). ISCP is an engineering group within CCG.

Who You Are

Your responsibilities are as follows but not limited to:

• You will be part of IP design team working on Audio subsystem Soft IP for client platforms.

• You should be able to independently work and develop various logic design, u-architecture and development activities including micro-architecture, RTL code from high level specs, ensure end to end design quality in terms ofLint/CDC/DFT/Synthesis/STA/FormalEquivalence etc.

• You would be expected to develop micro-arch of the block/IP you own and also participates in the various Architecture and Microarchitecture specifications forums the Logic components.

• Provides IP integration support to SoC customers and represents RTL/logic design team.

• Be the design owner, and review and drive test plan, assertions and overall quality of the block/IP.

• You should be able to interact with various stake holders (internal as well as external) to drive end to end quality, design objectives within stipulated schedule timelines.

• Must have the ability to clearly express technical concepts in verbal and written form

• Innovative thinker, problem solving, good communication skills, self-discipline and results orientation are critical soft skills needed.

• Good hands-on knowledge on industry standard EDA tools and HDLs

• You must be an extremely good team player and should be able to work across organization boundaries and domains.

• Strong skills in communication, initiative, promote innovation and teamwork.

• Highly motivated to learn and adapt to fast-changing technologies and environments

• Demonstrates fundamental values such as accountability, integrity and a winning mindset.

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications

• Bachelor’s Degree in Computer Engineering or Electrical Engineering with at least 3 years of relevant experience or Master’s Degree in Computer Engineering or Electrical Engineering with at least 2 years of related experience

• Experience in RTL design with Verilog and/or VHDL and timing analysis/closure.

• Experience with RTL verification. Strong analytical, and problem-solving skills as well as debugging skills

• Knowledge with Perl, C++, Java and shell scripts.

Experienced HireShift 1 (United States of America)US, California, Santa ClaraUS, California, Folsom
Position of Trust

offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US: