ARM Senior Memory Layout Engineer 

United States, Texas, Austin 

896860262

In this role you will be working on the following areas:

• Implementation of quality full-custom/cell-based layouts of high-performance arrays and memory blocks from supplied schematics: from planning including floorplan and wire plan through final layout verification and review, in accordance with strict guidelines for Performance, Power, Area (PPA) and manufacturability.
• Able to accurately estimate and lead schedules and effort for a significant piece of work.
• Understanding memory architectures and memory development flows.
• Resource for interpretation and implementation of all physical design rules in the latest technology processes used by Arm.
• Deep Knowledge of physical design verification (DRC/LVS/DFM) for all types of circuit and test layouts using industry standard verification tools.
• Supervision, mentoring and training of more junior and contract layout designers
• Extensive knowledge of prioritizing critical signals in block layout with concept of wire RC and block placement to achieve outstanding PPA.
• Expertise in analyzing IR drop and EM issues and implementing solutions in layout.

• Associates Degree in CAD, engineering field, or IC design certification or equivalent experience - 5 years previous experience preferred.
• Demonstrate project experience in physical IP (memories, standard cells, IOs, or PHYs)
• Layout experience in the newest technology 5nm or smaller.
• An understanding of basic memory layout, especially for SRAM.
• A good understanding of technology trade-offs in deep sub-micron technologies.
• Experience with Cadence Virtuoso or similar schematic and layout editing tools.
• You love working in a collaborative setting with can-do attitude.
• You enjoy innovation and continuous improvement.

• Ability to review the layout and find the improvements.
• Demonstrable scripting/automation capabilities to improve productivity.
• Familiar with programming like UNIX, SKILL, Shell.
• Leadership skills to lead a team of layout engineers