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Nvidia Senior Compiler Architect MLIR - LLVM 
United States, Texas 
889632368

01.12.2024

What you will be doing:

  • Provide technical leadership to a small team of engineers working on compiler middle-end optimizations.

  • Analyze the performance of application code running on NVIDIA GPUs with the aid of profiling tools.

  • Work with hardware architects, assembly language teams to help define architecture evolution, informed by application use-cases.

  • Identify opportunities for performance improvements in the LLVM based compiler optimizer.

  • Interact with Open-source MLIR/LLVM community to ensure tighter integration.

  • Work with geographically distributed compiler, architecture and application teams to oversee improvements and problem resolutions.

  • Be part of a team that is at the center of deep-learning compiler technology spanning architecture design and support through higher level languages.

What we need to see:

  • M.S or Ph.D. in Computer Science, Computer Engineering, or related fields (or equivalent experience)

  • 10+ years experience in Compiler Optimizations such as Loop Optimizations, Inter-procedural optimizations and Global optimizations and Program Analysis.

  • 3+ years technical leadership experience

  • Excellent hands-on C++ programming skills.

  • Excellent understand of architecture features used in parallel programming (fence, vote, synchronization directives etc.)

  • Experience writing significant analysis or transformation passes in LLVM framework.

  • Understanding of Processor ISA (GPU ISA would be a plus).

  • Strong background in software engineering principles with a focus on crafting robust and maintainable solutions to challenging problems

  • Good communication and documentation skills and self-motivated

Ways for you to stand out from the crowd:

  • Experience in developing applications in CUDA or other parallel programming language.

  • Deep understanding of parallel programming concepts.

  • Prior experience working with architecture teams on parallel processing hardware.

  • Experience working on compile-time improvements in JIT compilation contexts.

You will also be eligible for equity and .