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Nvidia Senior Photonics CAD Engineer 
United States, California 
882765141

Today
US, CA, Santa Clara
time type
Full time
posted on
Posted 5 Days Ago
job requisition id

What you will be doing:

  • Develop and implement physical design and layout methodologies for integrated photonic devices focused on high-speed optical interconnect and sensing applications.

  • Architect and advance design flows for photonic integrated circuits (PICs) layout, floor planning, waveguide routing, pCell creation, assembly, and backend verification using EDA tools like Cadence Virtuoso, supporting multiple concurrent projects from design through layout generation and sign-off.

  • Collaborate closely with device design, layout, foundry technology, and packaging teams to optimize workflows, enhance cross-functional efficiency, and solve complex silicon photonics design problems across different technology nodes.

  • Drive efficiency improvements in design verification, physical extraction, custom rule writing (DRC/LVS), and silicon validation for photonic and electronic ICs.

  • Provide training and documentation for design teams, establish best practices for code release, and ensure robust version control and design collateral management.

What we need to see:

  • MS in Electrical or Computer Engineering (or equivalent experience)

  • Minimum 5 years of experience in physical design engineering or photonic IC development, including hands-on EDA flow and tool development.

  • Solid understanding of all aspects of physical design, including floor planning, integration, clock and power distribution, place-and-route, verification, and layout sign-off.

  • In-depth expertise in Cadence Virtuoso, Calibre, and other industry-standard EDA tools for custom IC and photonics layout design.

  • Demonstrated proficiency in programming and scripting languages such as Python, Perl, and SKILL for tool and flow automation.

  • Strong background in hierarchical design methodologies, top-down integration approaches, anddesign-for-manufacturingconcepts including DFM, yield enhancement, and process constraint checks.

  • Excellent communicator with the ability to work cross-functionally and support large distributed design teams through flow training and tool support.

You will also be eligible for equity and .