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Apple Cellular ASIC Design Integration Engineer 
United States, California, Sunnyvale 
871469748

Yesterday
ON OUR TEAM YOUR RESPONSIBILITIES WILL INCLUDE: - Contributing to definition, architecture, design and development of cellular sub system. - Performing all aspects of front-end design flow including integration, power analysis, design checks, verification reviews, review synthesis, timing constraints. - Performing power analysis and analysis different design tradeoffs and drive power improvements. - Developing design methodologies for scalable designs. - Providing pre/post silicon debug support.
  • Minimum requirement of a bachelors degree.
  • Knowledge of the ASIC design flow, FE, Low power design and design verification, scripting.
  • Knowledge of ASIC/SoC design flow.
  • Knowledge of FE tools (CDC, RDC, LINT, Formal, LP Checks, LEC, PTPX).
  • Knowledge of RTL design and HDL languages (Verilog, System Verilog, etc.)
  • Analytical skills to be able to make design tradeoffs for best performance, low area, and low power.
  • Knowledge of power analysis tools/flows and UPF flow for defining power intent of chips with multiple power domains.
  • Understanding of version control tools and handoff of design releases.
  • Understanding of scripting skills to automate tasks and build scalable design flows.
  • Understanding of synthesis and STA constraints.
  • Familiarity with DFT, MBIST, Synthesis, STA and backend related methodology and tools.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.