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Apple CAD Engineer - Formal Verification United States, California, Cupertino 831459474
31.03.2025
Core Responsibilities:- You will be responsible for developing, maintaining, and enhancing an existing system of executing a formal verification tool- You will help out with supporting our existing Jasper reset analysis, SEC and formal proofing flows- You will help debug vendor tool problems and interact with designers/formal verification team to help solve their problems
- Experience scripting in Python, Perl, or Kotlin
- Experience in Software Development with Test in-mind
- Minimum requirement of Bachelors Degree
- Knowledge in Verilog and System Verilog is a plus
- Experience in formal verification is a plus
- Experience in continuous integration/continuous delivery solutions (ex. GitLab, TeamCity, Jenkins, etc) is a plus
- Experience with DevOps flows is a plus
- Machine Learning experience is a plus
- Comfortable with co-developing an existing system
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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