Your Impact
As a Signal/Power Integrity Engineer, you will play a key role in ensuring the performance and reliability of our high-speed SerDes IP, covering silicon, package, and board-level analysis. You will collaborate across multiple disciplines, including analog design, silicon integration, PCB & package design, and mechanical engineering.
- Provide implementation guidelines and feedback to silicon, package, board, and system design teams.
- Design and simulate high-speed SerDes signals and perform co-simulation of package and PCB in HFSS.
- Conduct feasibility studies, design verification, and sign-off processes, including lab correlation.
- Perform Power Distribution Network (PDN) analyses, including model generation and time-domain simulation.
- Work closely with backend, package, and board design teams for bump-out and ball-out optimization.
- Drive chip-package-PCB co-design of SerDes at 112Gbps and beyond, ensuring signal and power integrity best practices.
Minimum Qualifications
- B.Sc./M.Sc. in Electrical Engineering.
- 3+ years of relevant experience in signal/power integrity.
- Strong knowledge of electromagnetic and transmission line theory, as well as 3D/2D EM simulation tools.
- Experience in SI/PI methodology development, full-system signal integrity analysis, and PDN modeling from die to package to PCB.
Preferred Qualifications
- Experience with tools such as HFSS, MATLAB, Python, SIwave, PowerSI, PowerDC, ADS, Redhawk, Totem, and HSpice.
- Familiarity with networking technologies and high-speed connectivity solutions.
- Strong analytical and problem-solving skills with a hands-on approach to debugging and validation.