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Google CPU RTL Design Manager Silicon United States, California, Mountain View 822180951
20.11.2024
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 10 years of experience in high-performance CPU or AI accelerator logic/RTL design including micro-architecture definition and PPA optimizations.
- 6 years of experience in people management, developing employees.
- Experience with HDL language and front-end design methodology.
- Experience with CPU or AI accelerator integration with SoC.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- Experience leading front-end design for modern processor components or AI accelerators.
- Experience with ARM Instruction Set Architecture.
- Experience with SoC design, architect, and integration.
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